1. Technical Field
The present invention relates to a control apparatus and a control method.
2. Related Art
A memory device includes a large number of memory cells, and there may be defective memory cells amongst these memory cells. A device that is manufactured to include redundant memory cells for replacing these defective cells can perform a memory repair process, or redundancy process, to replace the defective memory cells with the redundant memory cells.    Patent Document 1: Japanese Patent Application Publication No. H10-222999
When performing the memory repair process, it is necessary to detect the positions of the defective memory cells and analyze how the detected defective memory cells are to be replaced by the redundant memory cells. In order to perform the memory repair process for a high-capacity memory under test, a fail memory can be provided having the same address space as the memory under test. However, this incurs a high cost and is therefore undesirable. Furthermore, in a system that counts the number of defective bits during testing and judges a row for which this number exceeds a prescribed value to be a row in need of replacement, if a row having an even greater number of defective bits is detected after all of the redundant memory cells have been allocated, this newly detected row cannot be replaced.